Liu Ming
A happy senior engineer!
Making a career out of a hobby makes me feel fulfilled and happy.
Mechatronics, automatic control, embedding, Internet of Things,
advanced intelligent manufacturing.
Hobbies: Diving, rope climbing, outdoor sports, gourmet, and more
Experience: Industrial products, multi-dimensional program planning
I had the honor of attending the lecture on stepper motor driver jointly hosted by ROHM Semiconductor and Chaihuo Maker Space. (Presented by Engineer Liu Shuo of ROHM Semiconductor.)
After the lecture, ROHM took out some stepper motor driver ICs and gave them to Chaihuo Maker Space—the contributor and supporter for the Maker Movement—as presents.
I received an IC chip too, and as an experienced engineer, I felt I should also do my part to contribute, so I designed an open source stepper motor driver using ROHM’s BD63521EFV chip.
My goal was to design a driver that’s as simple and easy-to-use as possible. It should also be practical for everyone to make it themselves. Therefore, the number of components was one of my top priorities. A minimal circuit was the focus of my design! Of course, cost must also be considered.
Since ROHM sponsored the chip, the “theme” was already predefined, which means I didn’t need to select the chip type. I simply browsed ROHM’s website and downloaded the BD63521EFV data sheet. After flipping through the data sheet, I decided to start from the example for applied circuits. This is shown in the figure below.
First of all, the absolute maximum ratings of these input terminals have been indicated on the data sheet: the input voltage cannot be greater than 7 volts. When the applied logic input voltage on terminals CW_CCW, MODE0, MODE1, ENABLE and PS is greater than 2V, it’s regarded as high level. When it’s lower than 0.8V, it’s regarded as low level; when the input voltage on terminal CLK is greater than 2.4V, it’s regarded as high level, and when it’s lower than 0.6V, it’s regarded as low level.
Of course, there are two more testing terminals that are not as electrically useful as the above in application: 11-pin (TEST0 terminal), 17-pin (TEST1 terminal), and the cooling terminal on the bottom of the chip.
I designed the peripheral circuit of the chip with the needs in mind, just like the figure below:
My first consideration was that the chip’s maximum allowable operating current should be 2A per channel, so I started by choosing a reasonable resistance value for the current sampling resistor.
Several factors have to be taken into consideration for the resistance value of this resistor.
First of all, if the resistance is too high, the voltage across the sampling resistor will be too high, and if the voltage is too high under the same current, then the power will be too high, which will in turn cause the resistor to burn out or make the use of a sampling resistor of greater power and volume necessary.
Second, if the resistance of the sampling resistor is too low, that will cause the sampling voltage range to become too low, which is counter-productive to anti-interference. It will also present a greater challenge for the current sampling amplifier circuit.
Third, standard resistances have to be considered to facilitate procurement process and reduce costs.
Fourth, the sampling power should be reduced as much as possible to improve efficiency and reduce rises in temperature, as smaller temperature rises will help improve the stability and service life.
Fifth, the package volume should be reduced as much as possible to help control the cost and reduce the volume.
Sixth, as pointed out in the data sheet, the resistance value should be between 0.1~0.3 ohms.
After considering the above factors and the recommendations from the data sheet, I decided on 0.2 ohms.
When the sampling current is 2A, the voltage across the sampling resistor is [2A*0.2R=0.4V], and the power dissipation of the sampling resistor is [2A*0.4V=0.8W]. According to my investigation, an ordinary carbon film chip resistor 2512 package, or a metal film chip resistor of a larger or smaller package could meet the power demands.
The circuit diagram is shown in the figure below:
Of course, as much as possible, the current sampling terminal should be connected to the near end of the resistor and the total resistance of the current loop should also be minimized. This way, sampling voltages will be more accurate and subject to less interference. The internal circuit of the current sampling terminal is shown in the figure below:
The input internal resistance is up to 5 kiloohms.
Note! The voltage on this terminal should not exceed 0.7 volts.
When selecting the reference voltage, I noted that the voltage should be between 0 to 3V as specified in the data sheet, as a reference voltage that’s too high will result in an excessive operating current through the chip, which will cause the chip to burn out.
I carried out the calculation according to the formula given on the data sheet:
Output current [A] = {VREF[V]/5}/RNF[Ω] ・・・(Micro-step mode)
Output current [A] = {VREF[V]/5}*0.7071/RNF[Ω] ・・・(Full-step mode)
If it’s a 0.2-ohm sampling resistor and the driving current in the full-step driving mode does not exceed 2A, then the reasonable value of the reference voltage should be no greater than 2.828V.
After checking the data sheet, I found that the reference current does not exceed a few uAs. Considering the relatively low reference source voltage, a step-down regulator circuit should be selected.
There are many forms of step-down regulator circuits. A switching step-down circuit is not suitable as a reference voltage source due to its large ripple. In addition, although an LDO step-down circuit is effective, its withstand voltage is often too low and its cost is high. In the end, to stick to the principle of circuit simplicity and to keep the cost low, I chose the classic Zener reference source, as well as a 2.7-volt regulator tube. I also used a classic π-type filter circuit to smooth the output voltage and filter out the interference ripple.
Of course, this kind of circuit inevitably has the disadvantage of having a relatively large output internal resistance.
However, the input resistance of this chip is relatively large as well, so it will not cause any impact. This is shown in the figure below:
The input internal resistance is up to 5 kiloohms.
I redid the calculations, with reference voltage as 2.7 volts and the sampling resistance as 0.2 ohms. The output current is as follows, according to the following formula:
Output current [A] = {VREF[V] / 5} / RNF[Ω] ・・・(Micro-step mode)
Output current [A] = {VREF[V] / 5}*0.7071 / RNF[Ω] ・・・(Full-step mode)
{2.7V/5}/0.2R=2.7A (Micro-step mode)
{2.7V/5}*0.7071/0.2R=1.91A (Full-step mode)
The calculation result verifies that when the maximum reference voltage is 2.7V, the output current can reach the maximum allowable output current of the chip.
Note! The input voltage range of reference voltages (VREF terminal) is 0 to 3V.
Of course, we can adjust and reduce the value of the reference voltage so that the output current can be easily set to a reasonable value. The simplest and most effective way to adjust the reference voltage value is to use an adjustable potentiometer with the upper end connected to the reference voltage source, the lower end grounded, and the adjustable end connected to the chip’s reference voltage input terminal.
There was already an explanation in the data sheet on how to set the decay mode. It is determined by the voltage value input to the MTH pin.
0~0.3 SLOW DECAY
0.4~1.0 MIX DECAY
1.5~3.5 FAST DECAY
Since the reference source voltage is 2.7 volts, which has already met the minimum voltage requirement of 1.5 volts set for the fast decay mode, there is no need to provide a separate voltage source, and the reference source voltage can be reused.
This design further reduces the number of components.
Considering the volume and the convenience of the settings, instead of using a DIP switch in the settings, I chose a small and compact adjustable potentiometer.
Methods of circuit connection: upper end is connected to the reference voltage source, lower end is grounded, the adjustable end is connected to the chip’s MTH terminal.
Note! The input voltage range on the MTH terminal is 0 to 3.5V.
This part is much simpler: it’s just a capacitor and a resistor connected in parallel, with one end grounded and the other end connected to the CR terminal. The PWM oscillation frequency can be set by adjusting the capacitance and resistance of the resistor.
Note! Although increasing the oscillation frequency helps improve the driving effect, an excessively high frequency will cause the switching loss of the internal MOS tube to increase significantly.
All logic input pins have built-in pull-down resistors, as shown in the figure below:
The input internal resistance is up to approximately 10 kiloohms.
When the voltage of all the logic input terminals is greater than 2V, it’s regarded as being at a high level. We can set the subdivision mode by connecting the 2.7V switch of the reference voltage source to the subdivision micro-step setting terminal with a two-digit DIP switch.
In order to prevent the reverse connection of the power supply, I’ve set up a high-current (5A), ultra-low dropout (0.55V@5A) Schottky diode for preventing reverse connections, and because its conduction voltage drop is very low, resulting in low power dissipation as well. And most importantly, the circuit is simple!
In order to improve anti-interference performance and stability, I’ve set up multiple filter bypass capacitors and two large electrolytic capacitors, which can effectively reduce the internal resistance of the power supply and filter out the interference on the power bus (input and output bidirectional).
The stepper motor can already work normally at this point, but I wanted to optimize it, so I added the input interface ESD protection chip to prevent ESD damage (for all four inputs).
| 1 |
Model |
Model on the circuit board |
Package reference |
Installation layer |
Quantity |
Description |
| 2 | CON | CON | HX2.54-5 | Top | 1 | Control input interface |
| 3 | 35V220UF | CP1, CP2 | 8X12W | Top | 2 | Power storage electrolytic capacitor |
| 4 | POWIN | GND | AWG-5X2 | Top | 1 | Power input terminal |
| 5 | 50K | MTH | VG039 | Top | 1 | Decay mode adjustable potentiometer |
| 6 | JP | PS | PIN2 | Top | 1 | Enabling driver jumper |
| 7 | 50K | REF | VG039 | Top | 1 | Drive current adjustable potentiometer |
| 8 | SW DIP | S | DIP-4 | Top | 1 | Subdivision mode setting switch |
| 9 | SM OUT | SM | HX2.54-2 | Top | 1 | Stepper motor driver terminal |
| 10 | 1nF (102) 10% 50V | CC | 0603_C | Bottom | 1 | Chopping frequency setting capacitor |
| 11 | 10uF (106) 10% 10V | C7, C8 | 0603_C | Bottom | 2 | Reference voltage filter capacitor |
| 12 | SS36-E3/57T | D1 | SMC(DO-214AB)_S1 | Bottom | 1 | Anti-reverse connection Schottky diode |
| 13 | MKT642U05 | E1 | DFN2510 | Bottom | 1 | Control input ESD protection chip |
| 14 | 100UH | FB | 0805_L | Bottom | 1 | Reference voltage filter inductor |
| 15 | 0.2R | RA, RB | 2512 | Bottom | 2 | Drive current sampling resistor |
| 16 | 39KΩ(3902) ± 1% | RC | 0603_R | Bottom | 1 | Chopping frequency setting resistance |
| 17 | 7.5KΩ(7501) ± 1% | RV | 1206_R | Bottom | 1 | Reference voltage current-limiting resistor |
| 18 | 8D63S21 | U | HTSSOP-B28 | Bottom | 1 | Driver chip |
| 19 | 2V7 | ZD | SOD-123 | Bottom | 1 | Reference voltage regulator tube |
| 20 | 100nF (104) 10% 50V | C1.C2,C3.C4,C5.C6 | 0603_C | Bottom | 6 | Bypass filter capacitor |
| 21 | BD63521 | |||||
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